The present invention relates generally to multilayer circuit boards and, more particularly, to an improved multilayer circuit board for enabling the stacking of electronic components.
Computer systems are increasingly used to perform more and more functions. As a result of this increase in functionality, the number of electronic components that are used within these computer systems correspondingly increases. Typically, such electronic components are mounted on a circuit board, which is then placed into a computer cabinet or chassis so as to allow the circuit board, and the electronic components mounted thereon, to interface with other circuit boards and electronic components. However, there is only a limited amount of space within a computer cabinet or chassis for accommodating circuit boards, and hence the electronic components mounted thereon. Thus, a need has arisen for developing schemes for increasing the density of electronic components on circuit boards.
Perhaps the first scheme that was developed for increasing the density of electronic components on circuit boards was the use of multilayer printed circuit boards. Such multilayer printed circuit boards allow more electrical signals to be routed between electronic components than what was previously possible using only single layer printed circuit boards. It follows that the density of electronic components is typically greater on a multilayer printed circuit board than on a single layer printed circuit board due to the increased number of electrical signals that may be routed between electronic components mounted on a multilayer printed circuit board.
While the use of multilayer printed circuit boards has allowed an increase in electronic component density, this increase in electronic component density has heretofore been limited by the amount of board surface area. That is, there is only a limited amount of surface area upon which electronic components may be mounted on a printed circuit board. With computer system functionality requirements, and hence electronic component requirements, only continuing to increase, there is a need to further increase electronic component density on multilayer printed circuit boards.
In view of the foregoing, it would be desirable to provide a technique for increasing electronic component density on multilayer printed circuit boards.
According to the present invention, a technique for increasing electronic component density on multilayer printed circuit boards is provided. In a preferred embodiment, the technique is realized as an improved multilayer circuit board for enabling the stacking of electronic components. The multilayer circuit board has a first electrically conductive layer and a second electrically conductive layer separated by at least one dielectric layer. The second electrically conductive layer is disposed beneath the first electrically conductive layer and the at least one dielectric layer within the multilayer circuit board. The improvement comprises a cavity in the multilayer circuit board extending through the first electrically conductive layer and the at least one dielectric layer so as to expose at least a portion of the second electrically conductive layer within the cavity. The cavity is sized to accommodate a first electronic component therein such that the first electronic component makes electrical contact with the exposed portion of the second electrically conductive layer and a second electronic component, which is stacked over the first electronic component, makes electrical contact with the first electrically conductive layer.
The first electronic component and the second electronic component are typically either an integrated circuit component or a discrete component. However, the first electronic component and the second electronic component may also be an electrically conductive shield. For example, the second electronic component may be an electrically conductive shield for shielding electromagnetic interference to and from the first electronic component.
The first electrically conductive layer and the second electrically conductive layer are typically electrically conductive signal layers. However, the first electrically conductive layer and the second electrically conductive layer may also be power/ground plane layers or combination electrically conductive signal and power/ground layers. For example, the second electrically conductive layer may be a power/ground layer having signal contacts formed thereon.
In accordance with other aspects of the present invention, at least the lateral dimensions of the cavity are sized to directly coincide with at least the lateral dimensions of the first electronic component. This alleviates the need for any specialized positioning equipment, which has heretofore typically been required when mounting electronic components on circuit boards.
In accordance with further aspects of the present invention, the cavity is beneficially formed as a channel through which air may be forced for cooling at least the first electronic component.
In accordance with still further aspects of the present invention, wherein the cavity is a first cavity, wherein the at least one dielectric layer is at least one first dielectric layer, wherein the multilayer circuit board has a third electrically conductive layer disposed beneath the second electrically conductive layer within the multilayer circuit board, and wherein the third electrically conductive layer is separated from the second electrically conductive layer by at least one second dielectric layer, the improvement further beneficially comprises a second cavity in the multilayer circuit board extending through the second electrically conductive layer and the at least one second dielectric layer so as to expose at least a portion of the third electrically conductive layer within the second cavity. Similar to above, the second cavity is preferably sized to accommodate a third electronic component therein such that the third electronic component makes electrical contact with the exposed portion of the third electrically conductive layer and the first electronic component is stacked over the third electronic component. In this case, the second cavity is preferably sized so as to be smaller in lateral dimension than the first cavity.
In accordance with still further aspects of the present invention, wherein the multilayer circuit board is a double-sided multilayer circuit board, wherein the cavity is a first cavity on a first side of the multilayer circuit board, wherein the at least one dielectric layer is at least one first dielectric layer, wherein the multilayer circuit board has a third electrically conductive layer and a fourth electrically conductive layer separated by at least one second dielectric layer, and wherein the fourth electrically conductive layer is disposed beneath the third electrically conductive layer and the at least one second dielectric layer relative to a second side of the multilayer circuit board, the improvement further beneficially comprises a second cavity on a second side of the multilayer circuit board extending through the third electrically conductive layer and the at least one second dielectric layer so as to expose at least a portion of the fourth electrically conductive layer within the second cavity. Similar to above, the second cavity is sized to accommodate a third electronic component therein such that the third electronic component makes electrical contact with the exposed portion of the fourth electrically conductive layer and a fourth electronic component, which is stacked over the third electronic component, makes electrical contact with the third electrically conductive layer. Significantly, the second cavity can be located substantially opposite the first cavity in the multilayer circuit board.
In an alternative embodiment, the technique is realized as a method for increasing electronic component density on a multilayer circuit board. The multilayer circuit board has a first electrically conductive layer and a second electrically conductive layer separated by at least one dielectric layer, and the second electrically conductive layer is disposed beneath the first electrically conductive layer and the at least one dielectric layer within the multilayer circuit board. The method comprises forming a cavity in the multilayer circuit board extending through the first electrically conductive layer and the at least one dielectric layer so as to expose at least a portion of the second electrically conductive layer within the cavity. The cavity is sized to accommodate a first electronic component therein such that the first electronic component makes electrical contact with the exposed portion of the second electrically conductive layer and a second electronic component, which is stacked over the first electronic component, makes electrical contact with the first electrically conductive layer.
In accordance with other aspects of the present invention, the cavity may be formed by etching the cavity in the multilayer circuit board. For example, the cavity may be formed by photolithographically etching the cavity in the multilayer circuit board, or plasma etching the cavity in the multilayer circuit board. Alternatively, the cavity may be formed by milling the cavity in the multilayer circuit board. For example, the cavity may be formed by laser abating the cavity in the multilayer circuit board. Alternatively still, the cavity may be formed by prefabricating the first electrically conductive layer and/or the at least one dielectric layer such that the cavity is formed upon assembly of the first electrically conductive layer and the at least one dielectric layer into the multilayer circuit board.
In accordance with further aspects of the present invention, wherein the cavity is a first cavity, wherein the at least one dielectric layer is at least one first dielectric layer, wherein the multilayer circuit board has a third electrically conductive layer disposed beneath the second electrically conductive layer within the multilayer circuit board, and wherein the third electrically conductive layer is separated from the second electrically conductive layer by at least one second dielectric layer, the method further beneficially comprises forming a second cavity in the multilayer circuit board extending through the second electrically conductive layer and the at least one second dielectric layer so as to expose at least a portion of the third electrically conductive layer within the second cavity. Similar to above, the second cavity is sized to accommodate a third electronic component therein such that the third electronic component makes electrical contact with the exposed portion of the third electrically conductive layer and the first electronic component is stacked over the third electronic component.
In accordance with further aspects of the present invention, wherein the multilayer circuit board is a double-sided multilayer circuit board, wherein the cavity is a first cavity on a first side of the multilayer circuit board, wherein the at least one dielectric layer is at least one first dielectric layer, wherein the multilayer circuit board has a third electrically conductive layer and a fourth electrically conductive layer separated by at least one second dielectric layer, and wherein the fourth electrically conductive layer is disposed beneath the third electrically conductive layer and the at least one second dielectric layer relative to a second side of the multilayer circuit board, the method further beneficially comprises forming a second cavity on a second side of the multilayer circuit board extending through the third electrically conductive layer and the at least one second dielectric layer so as to expose at least a portion of the fourth electrically conductive layer within the second cavity. Similar to above, the second cavity is sized to accommodate a third electronic component therein such that the third electronic component makes electrical contact with the exposed portion of the fourth electrically conductive layer and a fourth electronic component, which is stacked over the third electronic component, makes electrical contact with the third electrically conductive layer.
The present invention will now be described in more detail with reference to exemplary embodiments thereof as shown in the appended drawings. While the present invention is described below with reference to preferred embodiments, it should be understood that the present invention is not limited thereto. Those of ordinary skill in the art having access to the teachings herein will recognize additional implementations, modifications, and embodiments, as well as other fields of use, which are within the scope of the present invention as disclosed and claimed herein, and with respect to which the present invention could be of significant utility.